c2wirespiiso.h

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/****************************************************************************
** Copyright (C) 2020 MikroElektronika d.o.o.
** Contact: https://www.mikroe.com/contact
**
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** of this software and associated documentation files (the "Software"), to deal
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** furnished to do so, subject to the following conditions:
** The above copyright notice and this permission notice shall be
** included in all copies or substantial portions of the Software.
**
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** OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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#ifndef C2WIRESPIISO_H
#define C2WIRESPIISO_H
 
#ifdef __cplusplus
extern "C"{
#endif

#ifdef PREINIT_SUPPORTED
#include "preinit.h"
#endif
 
#ifdef MikroCCoreVersion
    #if MikroCCoreVersion >= 1
        #include "delays.h"
    #endif
#endif
 
#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_spi_master.h"
#include "spi_specifics.h"




#define C2WIRESPIISO_SET_DATA_SAMPLE_EDGE       SET_SPI_DATA_SAMPLE_EDGE
#define C2WIRESPIISO_SET_DATA_SAMPLE_MIDDLE     SET_SPI_DATA_SAMPLE_MIDDLE
 // c2wirespiiso_set



#define C2WIRESPIISO_MAP_MIKROBUS( cfg, mikrobus ) \
    cfg.miso = MIKROBUS( mikrobus, MIKROBUS_MISO ); \
    cfg.mosi = MIKROBUS( mikrobus, MIKROBUS_MOSI ); \
    cfg.sck = MIKROBUS( mikrobus, MIKROBUS_SCK ); \
    cfg.cs = MIKROBUS( mikrobus, MIKROBUS_CS ); \
    cfg.dis = MIKROBUS( mikrobus, MIKROBUS_AN ); \
    cfg.txen = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
    cfg.bne = MIKROBUS( mikrobus, MIKROBUS_INT )
 // c2wirespiiso_map // c2wirespiiso

typedef struct
{
    // Output pins
    digital_out_t txen;         
    digital_out_t dis;          
 
    // Input pins
    digital_in_t bne;           
 
    // Modules
    spi_master_t spi;           
 
    pin_name_t   chip_select;   
 
} c2wirespiiso_t;

typedef struct
{
    // Communication gpio pins
    pin_name_t miso;            
    pin_name_t mosi;            
    pin_name_t sck;             
    pin_name_t cs;              
 
    // Additional gpio pins
    pin_name_t dis;             
    pin_name_t txen;            
    pin_name_t bne;             
 
    // static variable
    uint32_t                          spi_speed;    
    spi_master_mode_t                 spi_mode;     
    spi_master_chip_select_polarity_t cs_polarity;  
 
} c2wirespiiso_cfg_t;

typedef enum
{
    C2WIRESPIISO_OK = 0,
    C2WIRESPIISO_ERROR = -1
 
} c2wirespiiso_return_value_t;


void c2wirespiiso_cfg_setup ( c2wirespiiso_cfg_t *cfg );

err_t c2wirespiiso_init ( c2wirespiiso_t *ctx, c2wirespiiso_cfg_t *cfg );

void c2wirespiiso_default_cfg ( c2wirespiiso_t *ctx );

err_t c2wirespiiso_write ( c2wirespiiso_t *ctx, uint8_t *data_in, uint8_t in_len );

err_t c2wirespiiso_read ( c2wirespiiso_t *ctx, uint8_t *data_out, uint8_t out_len );

err_t c2wirespiiso_write_then_read ( c2wirespiiso_t *ctx, uint8_t *data_in, uint8_t in_len, 
                                                          uint8_t *data_out, uint8_t out_len );

void c2wirespiiso_disable_device ( c2wirespiiso_t *ctx );

void c2wirespiiso_enable_device ( c2wirespiiso_t *ctx );

void c2wirespiiso_disable_tx ( c2wirespiiso_t *ctx );

void c2wirespiiso_enable_tx ( c2wirespiiso_t *ctx );

uint8_t c2wirespiiso_get_bne_pin ( c2wirespiiso_t *ctx );
 
#ifdef __cplusplus
}
#endif
#endif // C2WIRESPIISO_H
 // c2wirespiiso
 
// ------------------------------------------------------------------------ END